Category : Tutorials + Patches
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Chapter II The Interface


2.1 Parallel Interface

Hopefully you can now see that 8 Data Channels in Parallel with
each other can output an 8 bit code that represents a piece of
information.

Computers manage data in the Parallel format using a Data Bus. Interfacing
with this Data Bus is easy as all you need to do is access the information
in its Parallel form via the CPU. Information can be taken from or
placed onto the Data Bus via the CPU without altering the Data.

The data is provided at an interface as 8 Bit Channels or 8 Data Lines.
An additional line is also provided called a clock or strobe line.
This clock is used to keep the eight data bits aligned as they walk
through the parallel bus and interface. Without this clock the 1's
and 0's provided at the interface would not be in sync. The data is
"clocked or strobed out". The receiving device uses the clock to
sync itself to the Parallel Data that is being output.

The Parallel Interface also requires one Data Channel to let the Interface
know if it is Sending or Receiving Data. The same eight lines are used
for incoming and outgoing data.

An interesting feature of the Parallel interface, is its ability
to pass data at extremely high rates of speed. Unlike a serial
interface with predetermined rates, a parallel interface can
transfer data at the maximum rate of the device it is connected to.
The Parallel interface Uses buffers and control signals to prevent
exceeding each others capabilties.

Since the Parallel Interfaces is used it is important to know it
exists, but you will have to pardon me, as I desire not to proceed
in more detail as in the world of Data Communications, it is the
Serial Port that we will more likely encounter...............

...........The serial interface, we will see, is one of the most
inefficent and cumbersome methods of communicating. So much so that
it was nearly orphaned by Industry in the 70's.


Parallel Interface Serial Interface (ASYNC)

ÚÄÄÄÄÄÄÄÄÄÄÄÄ¿ ÚÄÄÄÄÄÄÄ¿
³Data Bit 1 ³---- 0 ³Send ³--- 01100010
³Data Bit 2 ³---- 1 ³Receive³---
³Data Bit 3 ³---- 1 ³Ground ³---
³Data Bit 4 ³---- 0 ³ ³
³Data Bit 5 ³---- 0 ³ ³
³Data Bit 6 ³---- 0 ÀÄÄÄÄÄÄÄÙ
³Data Bit 7 ³---- 1
³Data Bit 8 ³---- 0
³Clock Strobe³----
³Ground ³----
³ ³
³TX or RCV ³
³ switch ----³----
ÀÄÄÄÄÄÄÄÄÄÄÄÄÙ

Our two interfaces, the parallel and serial interface in their
simplest forms. Of course a Parallel interface is not limited to
8 Data channels. You can use fewer or more depending on hardware.

The serial interface appears to be less complex. Data, instead of
being transfered in parallel form with each data bit having its own
channel, is serialized. The 8 data bits come off the same channel
one after the other in specific order. (see above)

To transfer data using a parallel interface requires a minimum of
11 wires (not including control signals) while the serial interface
requires only 3. (likewise)

The parallel interface would require multiple phone lines (example:
one line per Data channel or one line per wire) to be able to
utilize the parallel form of transmission. This limitation is why
Parallel Interfacing is not more widely used.


2.2 Serial Interface

The serial interface needs only one phone line for transmission.
But their is where the benefit ends.

Serial communication is the oldest form of communication. In
transmitting morse code, one bit of information is sent at a time.

Why even the indians serialized their smoke signals sending one
bit at a time. Having eight indians sitting next to each other,
trying to create simultaneous clouds of smoke, would have been a
waste of good man power. (hey its getting late, what can I say).


³ ÄÄÄ Data Bits ÄÄ ³  stop bit

IDLE 1 0 1 1 1 1 0 0 1 1
ÄÄÄÄÄÄÄÄÄÄ¿ ÚÄÄÄ¿ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ÚÄÄÄÄÄÄÄ¿
³ ³ ³ ³ ³ ³ ³
³ ³ ³ ³ ³ ³ ³
ÀÄÄÄÙ ÀÄÄÄÙ ÀÄÄÄÄÄÄÄÙ ÀÄÄÄÄ
  
start Parity start bit
bit Bit next character


Figure 1.0 Asynchronous serial Data Bits


The serial interface comes in several assorted flavors. The basic serial
interface uses the Asyncronous (ASYNC) form of transmission. As was
mentioned earlier, in serial communication, data bits are transfered
over a single data channel in consecutive form one after another.

This mode of transmission requires a stabile enviorment in that
should an irregularity happen to one Data Bit, all Data Bits
thereafter may be misread or out of Sync. If we attempted to send

1110 0000 1110 0000 (the letters pp ) and we lost our first 1,

we would receive 1100 0001 1100 000_ (all bits shifting over one
position).

The integrity of our Data is now lost.

How do we protect ourselves from this inherent danger ??

How do we distinguish data from line noise ?

How do we know if we are using an 8 bit word versus 7,9 or 10 ?

When a Data channel, in serial mode, is not being used (idle) it
rests in the "on" or "1" state. The transmission is begun by turning
off the Data Channel.

The turning off of the Data Channel, removing it from the idle state
is called a "Start Bit". A start bit is the first bit preceeding
every "Data Word" (Data transmission or transmitted character)

Bear in mind that in this basic mode we call Async communication,
we are transmitting data one character at a time. That means each
character transmitted requires a start bit.

Immediately following the start bit are the serialized data bits.
Not all systems use the full 8 data bits. Some use only 7 or 6,
others may use 9.


2.3 The Parity Bit


A bit, designed to help insure that our charcter was received
properly, is added immediately following the data bits. This is
called the parity bit. It is not always used.

Parity is either odd or even. Parity is checked by counting up
the number of 1's among your Data Bits. (start & stop bits not
included).

If employing EVEN parity, the object is to have an EVEN number
of ones between the start and stop bits. If we have an odd
number of 1's among the Data Bits, the parity bit is made a
"1" to make the number of 1's even. If the number of 1's among
the Data Bits is already even, then we add a "0" as our parity bit
to keep the number of 1's even.



Example 01101101 there are 5 1's so we add another to make
it even 011011011

Example 10101010 there are 4 1's so we add a zero to keep
it even 101010100

If employing ODD parity, the object is to have an odd number of
ones between the start and stop bits. The parity bit will be a
"1" or "0" as required to be added to insure that the number of 1's
is in fact an odd number of 1's between the start and stop bits.

Example 01101100 there are 4 1's so we add another to make
it odd 01101100

When a character is received, the number of 1's is counted up and
compared to the parity bit thus checking to see if any data bits
had changed during transmission. If the parity does not match, an
error is indicated and a retranmissiom might occur.

In the old days, when serial communication was used on teletype or
other ancient devices, the mechanics of the machinery required
delay times between characters. For this reason, stop bits were
added to the end of our character. Depending on the amount of
delay needed, they would add 1, 1 1/2 or 2 stop bits. These do
nothing more than mark the end of the character.

WOW !! To transmit 8 data bits, it takes 11 bits.
We just cut our throughput by about 1/3.

Right ?? 8 data bits, 1 start bit, 1 Parity Bit & 1 stop bit.

Lets not dwell on it. In the coming age, we will see how
compression techniques strip away those excess bits.


2.4 Bit Length

Anyhow, back to our diagram, figure 1.0

The start bit signals the beginning of the data flow. The start bit
is one full data bit long. And just how long is a data bit ???

That depends on the transmission rate or how many bits per second
we are transmitting.

If you are operating at 300 bits per second then you would divide
300 into 1. Likewise 1200 or 2400 etc.

1
Bit Length = --------
BPS rate


Lets take 1200 bps. 1200 into 1 = .83 msec (rounded off)

The receiver, however MUST be able to interpret line noise from
real data. Otherwise it would see every postive glitch as a start
bit. This could drive the receiver crazy and put it out of sync
with REAL data.

As a result, modems have a clock that operates a minimum of 16 times
faster than the bps rate. The "Start bit" gets sampled (the receiver
looks at and verifies the data bit to make sure it is valid) at
least 16 times throughout its bit length. This enables the modem
to see the data bit from beginning to end.


This figure shows a "Start bit" with 16x Sample clock for 1200 BPS

ÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ÚÄÄÄÄÄ
³ ³
The Bit ---- ³ -------------- .83 msec ------------------ ³
³ ³
ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ

³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³
16x Clock ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³
Pulses ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³
ÄÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁÄÄÁ
                
³
³

Spike Clock Established


You may be wondering, what all this has to do with modems. What we
are doing is disecting, or preparing to disect the computer side
of the modem.

-----------------------------------------------------------------------

The 16x clock (the modem clock that is 16 times faster than the BPS
rate) helps the modem determine a REAL start bit from noise.

A circuit then remembers the bit length and generates a spike clock
which acts as a data sampling window. This spike clock happens in
the middle of each bit time. The sample is taken and the state of
of the bit (1 or 0) is determined.


The following illustrations depicts the commencement of an
Asyncronous Data Transmission.

Note the idle state with the 16x clock monitoring the line
looking for the Change in state to begin checking for Real
Data.

Note the sampling clock, checking at the center for each bit time
to see if the Data Bit is a "1" or "0"


IDLE Start First 2nd Data
State Bit Data Bit "0"
Bit "1"
ÄÄÄÄÄÄÄÄÄÄÄÄ¿ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ÚÄÄÄÄ
Data ³ ³ ³ ³
Stream ³ ³ ³ ³
³ ³ ³ ³
ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ



³³³³³³³³³³³³³³³³³³³³³³³³³³³³ ³ ³
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
16x Clock Sampling Spike Clock


-----------------------------------------------------------------------

In most comm programs, as you type, you are transmitting letter by
letter. One start bit, Data Bits, Parity Bit and Stop Bit(s) ; each
and every time you press a key.

Another way of transmitting is to collect your letters in a buffer,
join them together and transmit them non stop from beginning to end.
Joining these characters together is to create a "Block of Data" or
a "Data Packet" .


This Figure Shows Two Characters Transmitted Consecutively


1 1 0 1 1 1 0 0 1 1 0 0 1 0 0 1 1 1 1
¿ ÚÄÄÄÄÄÄ¿ ÚÄÄÄÄÄÄÄÄ¿ ÚÄÄÄÄÄÄ¿ ÚÄÄÄ¿ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄ
³ ³ ³ ³ ³ ³ ³ ³ ³ ³
ÀÄÄÙ ÀÄÄÙ ÀÄÄÄÄÄÄÙ ÀÄÄÄÄÄÄÙ ÀÄÄÄÄÄÄÙ etc. etc.
   
³
Start Parity ³ Start
Bit ³ Bit
stop
Bit




2.6 Data Blocks


The actual size of Data Blocks and Packets of Data can vary from 8
bits to millions of bits depending on the transmission media.

There are many advantages to sending data in blocks instead of one
character at a time. Most of them we will discuss soon. The most
obvious is efficiency. No time gaps between characters. Parity bits
for each character can be eliminated and replaced with a Cyclical
Redundancy Check (CRC) or Block Check Character (BCC).

The BCC & CRC work in different ways but their essential operation
and effect is the same. As the data block is being transmitted,
a CHECK NUMBER is being calculated based on a predetermined
algorithm. The result of this calculation generates an ASCII code
that is entered as the last character in the data block. At the
receiving end, the data block is treated to the same mathematical
equation which results in another ASCII code being generated.
If the ASCII code generated at transmission is identical to the
code calculated upon receit, then it is assumed the data block
arrived intact. If they do not match, the receiver assumes the
data has been corrupted. A retransmission is then requested.

When the BCC or CRC is being used, a program may strip out the
parity bit. Since the BCC or CRC is used to determine if the
data was received without any errors, the parity bit is now
redundant and no longer essential.

In a Data Block, the start and stop bits (except for the very first
start bit and very last stop bit) may also be stripped out. The
software at the transmitting end performs this function. At the
receiving end, the software may reinstall the start and stop bits
into the data if it is desired or neccessary.

Since computers can operate at a much higher speed than a modem,
removing and adding bits inside the computer is faster than
transmitting useless start and stop bits.

This ability to strip away start, stop and parity bits can create
a world of flexibility. For example........

At one end you have a device that wants to use 2 stop bits and
odd parity. At the other end, the computer wants to use 1 stop
bit and even parity.

With the proper software, the stop bit and parity bit can become
whatver you want it to be after the character is extracted from
the Data Block.




2.6 Protocols


A "protocol" is a convention that establishes guidelines for the
transmission of Data. Asynchronous is a Protocol. Some of the
conventions employed by this protocol are start, parity and stop
bits.

There are many protocols. Some are standardized and some are not.
BISYNC (Binary Synchronous Communication) is another Protocol
commonly used in Data Transmission. (remember we are only dealing
with Data Bits in this Chapter).

In BISYNC, Data is transmitted in Data Blocks of varying size.
In place of a start bit, this protocol requires one or more
SYNC charcters as a marker for the beginning of the Data Block.
The SYNC character is a specific code or may be a code
selected for that purpose.

The SYNC characters were initially used to insure the modem had
time to come in SYNC to receive the incoming data.

After the Sync charcter, the Data block has a character
designated as "Start of Text" (STX)

Now follows the data which can be a few characters or a few thousand
characters.

The second last character in the Data Block is an "End of Text" marker.
The last character in the block is a Block Check character.

Other forms of protocols are significantly different in operation but
all usually employ some technique for designating start of text, end
of text and a BCC of some kind.

Another difference in transmission is the data code itself. ASCII is
one type of code ( 1's and 0's = a particular letter, number etc.).

EBCIDIC is another code. (Extended Binary Coded Decimal Interchange
Code) where the 1's and 0's can have different designations.

There is the Elliot 803, Five unit Telecode,
the PDP-8 Typsetting, six unit code
NYSE six unit code (NY stock exchange)


It is not neccessary to memorize all the different codes. I have a
table of codes that I use when on a customer site. I would recommend
the purchase of a book which lists ASCII and EBCIDIC as a minimum.

The purpose of this diversion is to bring your attention to the
many variations in Data Communications and to lay the ground work
for an eventual incursion into the world of BISYNC communication.



The UART


We started out with Parallel data and ended up with serial data.
But how did the Parallel data from our computers data bus get
into this serial format.

While it can be done with an array of logical devices, there is
one device more commonly used for this conversion. This device
is called a UART (Universal Asynchronous Receiver Transmitter).

The UART is a MOS device. It is a complete subsystem that
converts parallel data to serial data, serial data to parallel
data, determines and inserts parity bits, checks received
parity bits, creates the start bit, selects the number and
inserts the stop bits, control the number of bits per character
and even buffers everything to give itself time to do all these
good things.

But it doesn't do windows (the glass kind). Nothing is perfect.

The heart of the UART is a shift register.

In the transmitter, Parallel Data enters an 8 bit register
and is clocked out in serial form.

In the receiver, Serial Data is input until all 8 bits have
been received in proper order, then they are simultaneously clocked
onto the Parallel Data Bus of the computer.



The Parallel to Serial Converter in the Transmitter

Parallel Data Channels

³ ³ ³ ³ ³ ³ ³ ³
        serial data
ÚÄÁÄÂÄÁÄÂÄÁÄÂÄÁÄÂÄÁÄÂÄÁÄÂÄÁÄÂÄÁÄ¿
³ 1 ³ 0 ³ 1 ³ 1 ³ 1 ³ 0 ³ 0 ³ 1 ³--- 10111001 to modem
ÀÄÄÄÁÄÄÄÁÄÄÄÁÄÄÄÁÄÄÄÁÄÄÄÁÄÄÄÁÄÄÄÙ

ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ

The Serial to Parallel Converter in the Receiver


ÚÄÄÄÂÄÄÄÂÄÄÄÂÄÄÄÂÄÄÄÂÄÄÄÂÄÄÄÂÄÄÄ¿
01100110 ---- ³ 0 ³ 1 ³ 1 ³ 0 ³ 0 ³ 1 ³ 1 ³ 0 ³
ÀÄÂÄÁÄÂÄÁÄÂÄÁÄÂÄÁÄÂÄÁÄÂÄÁÄÂÄÁÄÂÄÙ
serial data        

Parallel Data to Computer


Yes, I am showing all of this in its simplified form. This is
after all only the "provide a background" for the course, course.

A course in Logic Circuits, Boolean Algebra and even basic
electronics would be of help in this study.


The UART allows, through external devices (switches), the selection
of the number of data bits, type of parity bits and start and stop
bits.

It is not neccessary to know any further the inner working of
the UART. Knowing where this processing is being done is all
you need to know. However for your information and to peak your
curiosity, a layout of the UART along with an explanation of its
inputs and outputs has been provided.


The "UART" as a Centerfold

-12v
+5v ÄÄÄÄ¿ ³ Grd. ÚÄÄ Ext. Reset
³ ³ ³ ³
ÚÄÁÄÄÁÄÄÁÄÄÄÄÁÄÄÄÄÄÄÄÄÄÄ¿
³ 1 2 3 21 SO 25ÃÄÄÄÄ Serial Output
³ SI 20ÃÄÄÄÄ Serial Input
³ ³
ÄÄÄ´33 DB8 2SB 36ÃÄÄÄÄ Select Stop Bits 1 or 2
ÄÄÄ´32 DB7 POE 39ÃÄÄÄÄ Select Parity odd/even
Data ÄÄÄ´31 DB6 NP 35ÃÄÄÄÄ Parity Yes/No
Bits ÄÄÄ´30 DB5 ³
Input ÄÄÄ´29 DB4 NB1 38ÃÄÄÄÄ Select # of Bits
from ÄÄÄ´28 DB3 NB2 37ÃÄÄÄÄ per character
Data ÄÄÄ´27 DB2 ³
Bus ÄÄÄ´26 DB1 RCP 17ÃÄÄÄÄ Receiver Clock
³ TCP 40ÃÄÄÄÄ Transmitter Clock
³ ³
ÄÄÄ´5 RD8 TBMT 22ÃÄÄÄÄ Trans Buffer Empty
Data ÄÄÄ´6 RD7 EOC 24ÃÄÄÄÄ End of Character
Bits ÄÄÄ´7 RD6 ³
Output ÄÄij8 RD5 ³
To ÄÄij9 RD4 FER 14ÃÄÄÄÄ Frame Error
The ÄÄij10 RD3 PER 13ÃÄÄÄÄ Parity Error
Data ÄÄij11 RD2 ³
Bus ÄÄij12 RD1 DA 19ÃÄÄÄÄ Receive Data Available
³ RDA 18ÃÄÄÄÄ Reset Data Available
Status Word ³ ³
Enable ÄÄÄ´16 SWE DS 23ÃÄÄÄÄ Data Strobe
³ CS 34ÃÄÄÄÄ Control Strobe
Receive ÄÄÄ´4 RDE ³
Data Enable ³ OR 15ÃÄÄÄÄ Overrun
³ ³
³ ³
ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ



Pin # Description Explanation

1 +5v +5volt Power input
2 -12v -12volt Power input
3 Grd Power Ground

4 Receive Data Permits clocking of Received Data
Enable (after conversion from serial format)
onto the Data Bus

5-12 Received Data The eight received data bits that
Lines (Channels) were received in the serial mode
and then converted to Parallel

13 PER Goes High to indicate the Data Character
Received does not match the selected
Parity

14 Framing Error Goes High if the received character did
not have a valid Stop Bit (might indicate
missing bit)

15 Overrun When High, it indicates a character is
present for receit but the uart has not
disposed of the previous character

16 Status Word Used to indicate a status flag is
Enable happening (Parity Error, Overrun etc)

17 Receiver Clock The clock provided to the Uart by some
external device which must be 16 times
the receivers BPS rate.

18 Reset Data Avail Reset for RD1 through RD8

19 Receive Data Indicates a whole character has been
Available received

20 Serial Input Input for Serial Data

21 External Reset Resets all Registers in the Uart

22 Transmitter Goes high when the Uart is ready to
Buffer empty receive another character

23 Data Strobe Allows Data to be loaded into Registers
for transmission

24 End Of Character Indicates a full character has been
transmitted including stop bit

25 Serial Output Output of serial Data

26-33 Data Input Lines Parallel Data taken off of the Data
Bus before conversion to serial Data

34 Control Strobe Loads control bits (Number of Data bits,
Number of stop bits etc.)

35 No Parity Select Parity Bit to be inserted or not
to be inserted

36 Two Stop Bits Allows you to select one or two stop
bits

37-38 NB1-NB2 Select Number of Bits per character

Bits/Chara NB1 NB2

5 Low Low
6 Low High
7 High Low
8 High High

39 Even Parity Select When Parity is selected allows you to
select even or odd parity

40 Transmitter Clock Input for external clock which must be
16 times the tranmitters BPS rate.


  3 Responses to “Category : Tutorials + Patches
Archive   : CLASS.ZIP
Filename : CHAPTER.02

  1. Very nice! Thank you for this wonderful archive. I wonder why I found it only now. Long live the BBS file archives!

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