Dec 092017
 
Speed Adjustment programs for AMI Mark III Motherboards.
File AMISPD2.ZIP from The Programmer’s Corner in
Category System Diagnostics
Speed Adjustment programs for AMI Mark III Motherboards.
File Name File Size Zip Size Zip Type
AMIFAST.ASM 1587 658 deflated
AMIFAST.COM 85 82 deflated
AMINCACH.COM 67 65 deflated
AMISLOW.COM 86 84 deflated
AMISPD2.DOC 2043 1018 deflated

Download File AMISPD2.ZIP Here

Contents of the AMISPD2.DOC file



Speed control programs for AMI 386/486 MARK III cache motherboard.

These programs work ONLY with the new MARK III motherboard. This is the
one with a special socket for an AMI 486 daughterboard. They will not
work with older (MARK II, etc.) motherboards, but a program is available
on many BBS'S (usual name AMISPEED) from Michael Geary for that purpose.
Thanks to Mike for this idea, and to AMI for the required information.

Three programs are supplied in this file:
AMIFAST.COM Sets fast speed and enables cache, like ctrl-alt-plus
AMISLOW.COM Sets slow speed and disables cache, like ctrl-alt-minus
AMINCACH.COM Disables cache, like ctrl-alt-shift-minus

AMINCACH only functions in fast speed. The cache is always disabled
when motherboard is running at slow speed.

These programs permit you to control motherboard speed from a program
or a batch file, as when you may set up a batch file to run a game
which only works (or only is playable) at slow speed. If the program's
message display is obtrusive in a particular case, redirect it to the
NUL device (e.g. use AMISLOW > NUL in your batch file) and it will be
suppressed.

ASM source code is provided for one program, with commented out changes to
accomplish any of the other goals, plus a toggle option. Naturally, you
will also want to modify the message when making these changes.

Motherboard speed is controlled by the contents of register 0bh of
port 461h. Bit 0 controls the speed (1 = fast), bit 1 controls the
cache (1 = enabled). Register 0bh is accessed by first writing 0bh to
index port 460h, pausing a decent period (note built-in delays), then reading
port 461h. Then, all you have to do is change the appropriate bit(s) and
repeat this process, ending up with a write to port 461h.

Enjoy. These programs are in the public domain. When distributing
them please include all 3 programs, source code, and this document.

Bob Thompson Chicago IL 25 Aug 90
Exec BBS, Milwaukee
CompuServe 73367,501




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